Explore the cutting-edge field of semiconductor design—chiplet (chiplet technology). As a revolutionary solution to expand complex chips and get rid of the chip mask size limitation (reticle limitation), the application of chip technology has attracted the attention of the entire industry.

In this article, we'll take a closer look at the top five challenges that are preventing widespread adoption of core particle technology and how the industry can overcome them to unleash the full potential of this transformative technology.

What is a chiplet?

Dies are small semiconductor dies (chips) that perform specific functions within an integrated circuit. Unlike traditional chips that create a single chip to handle all functions, chip technology breaks down different components or functions into different chiplets.

These dies can be independently designed, manufactured and tested, providing flexibility and scalability for semiconductor development.

Why do you think chiplets are the future trend?

Chip technology is considered the future of semiconductor design for the following reasons:

Scalability: Core die technology provides a scalable solution that overcomes the limitations imposed by chip mask dimensions in semiconductor manufacturing. Designers can use multiple dies to create a scalable architecture, where each die is dedicated to a specific task, rather than pushing the boundaries of a single large chip.

Flexibility: Core chip technology provides a modular approach to chip design, allowing designers to match and combine different components according to specific requirements. This flexibility enables designers to tailor solutions based on the needs of diverse applications ranging from consumer electronics to data centers.

Time to market: Independent development of smaller core particles may shorten product time to market. It allows the development of different components in parallel, thus simplifying the overall design and manufacturing process.

Cost-Effectiveness: Chip technology helps save costs by allowing standardized chipset designs to be reused across a variety of products. Additionally, the modular nature of core pellet technology allows companies to focus on optimizing the production of individual pellets, thereby increasing yields and reducing overall manufacturing costs.

Performance Optimization: Cores offer a way to optimize performance by customizing specific cores for specialized tasks. This specialization results in a more efficient, power-saving design, improving overall system performance

Five major barriers to adoption of core particle technology

Wafer Management: 

Maximizing Efficiency and Minimizing Costs One of the fundamental challenges with die technology is complex wafer management. In die-based designs, a single chip may be composed of multiple die, with each die set fabricated on a separate wafer.

For example, an XPU with N chips requires N wafers, complicating the manufacturing, testing, and assembly processes. Combining these disparate dies into a cohesive package through heterogeneous integration increases complexity, time sensitivity, and the potential for errors.

Additionally, the cost of managing multiple wafers per design is a significant hurdle, challenging the economic viability of die-based approaches.

To illustrate: Consider a semiconductor company that uses die technology to develop high-performance graphics processing units (GPUs). The GPU is composed of multiple core groups, each of which is responsible for specific functions such as shader processing, memory management, and rendering.

To maximize the efficiency of wafer management and reduce costs, the company uses advanced scheduling algorithms to optimize the production of each die on dedicated wafers.

This strategy helps streamline the manufacturing process and ensures that each wafer meets the required specifications, making the production line more cost-effective.

Yield Challenge 

Improving Chip Manufacturing Yields

Yield management is an important aspect of semiconductor manufacturing, and chipsets bring new complexities to the process.

Although splitting a single chip with a larger area into dies with lower design complexity may seem to have yield advantages, as the number of dies increases, the yield inspection process becomes increasingly time-consuming and labor-intensive. . Managing the specifications of multiple die can further complicate the yield optimization process.

To alleviate this problem, it has been suggested to consolidate larger functional blocks into a single die, but challenges remain in achieving and managing the required yields.

The industry must solve these yield challenges to truly make the chip a viable alternative to traditional single integrated chip designs.

Case in point: A semiconductor manufacturer is producing die for next-generation artificial intelligence (AI) processors.

Recognizing the yield challenges associated with multi-core pellets, the company invested in advanced machine learning algorithms to analyze data from each production run.

By leveraging predictive analytics, manufacturers can identify potential yield issues early in the production process and make proactive adjustments to optimize production conditions.

This approach not only improves overall productivity, it also ensures that the final core product meets quality standards, reducing the likelihood of yield-related setbacks.

Test efficiency

Streamline processes for optimal performance

Testing efficiency of core particles is another significant obstacle. Because each die is on a separate wafer, the test process becomes a critical, resource-intensive step in the entire development process.

Integrating singulated dies from multiple wafers to create the final silicon chip expands test requirements and requires additional resources and test hardware. The resulting increase in testing costs. This raises questions about whether core-based designs are overall more "economical" than traditional integration methods.

The industry must develop streamlined testing processes to optimize efficiency and minimize costs associated with core particle testing.

To illustrate: Imagine a technology giant is developing a die-based system-on-chip (SoC) for smartphones. With numerous cores providing different functions, test efficiency becomes a critical issue.

The company implemented a comprehensive automated test framework that integrates the unique test requirements of each chip. The framework allows testing of multiple cores simultaneously, significantly reducing test time and resource requirements.

As a result, the company achieved a more efficient testing process, ensuring the reliability and performance of die-based SoCs.

Cost Impact

Balancing Innovation and Economics

The use of core particles has changed the cost evolution of semiconductor manufacturing. The cost of manufacturing, testing and assembling chips continues to rise due to the inherent complexity of managing multiple wafers.

For core chips to become an alternative to expensive integrated chip designs, balancing these costs is critical. While core particles are positioned as a "beyond mole" solution, cost optimization is critical to their widespread acceptance.

The challenge is to be able to control the increasing costs of designing chips to the extreme dimensions of the reticle and keep the die-based approach economically viable.

For example: A startup is pioneering the use of core chip technology to provide cost-effective solutions for edge computing devices. Recognizing the cost impact of managing multiple wafers, the new company adopted a modular design approach.

By developing standardized, modular cores that can be reused across different product lines, the company minimizes the need for custom manufacturing processes, thereby reducing overall costs.

This approach allows the startup to balance the innovativeness and economics of core particle design, making its products competitive in the market.

Manpower needs

Forming a future-oriented expert team

A less discussed but equally important aspect of adopting core pellets is the human resource requirements.

Developing and managing a die-based design requires a skilled workforce with expertise in handling the intricacies of multiple die, which increases overall development costs.

Die-based designs require a broader talent pool than single-chip integration approaches, an economic factor that companies must carefully weigh.

To illustrate: A semiconductor research institute is at the forefront of chip technology development. Understanding the importance of a skilled workforce, the institute has partnered with universities to offer specialized courses in core particle design and manufacturing.

By actively promoting the education and training of future engineers and researchers, the institute ensures a steady supply of people with the expertise required for core particle design.

This proactive approach to human resource construction can meet the demand for professional and technical talents in the field of core particles.

Conclusion

Using die is the future of semiconductor design

In the dynamic world of semiconductor design, overcoming five key barriers is critical to the widespread adoption of die technology. Discover how the industry is addressing these challenges, fostering innovation, and reshaping the future of semiconductor design and manufacturing. Learn how core particle technology is a driver of industry change.

Unlocking the potential of die technology and staying ahead of the dynamic world of semiconductor innovation requires a deep understanding of the challenges and solutions for integrated chip design using fully optimized die.

This article was translated by Mr. Huang Letian from the Center for Integrated Circuits and Systems of the Yangtze River Delta Research Institute (Huzhou) of the University of Electronic Science and Technology of China under the guidance of Feng Mengqi, a member of the "Strengthening the Core and Building the Soul" program of the University of Electronic Science and Technology of China. The "Strengthening the Core and Building the Soul" plan is a plan by the University of Electronic Science and Technology of China to rely on the school's advantageous subject resources and industry-education integration resources in the field of integrated circuits, and give full play to the energy of the National Key Laboratory of Electronic Thin Films and Integrated Devices and the National Integrated Circuit Industry-Education Integration Innovation Platform. Focusing on core key technologies such as integrated circuit design, manufacturing technology, advanced packaging, and EDA, we implemented a special action plan for comprehensive training. We hope to explore a new talent training path for our country that can "produce talents quickly and produce high-quality talents". Original link: 

https://techovedas.com/5-major-hurdles-in-chiplet-adoption-as-more-than-moore-solution/

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