Despite the continued penetration of digital technology into every area of commercial, industrial and leisure activities, analog integrated circuits (ICs) continue to have a place in the global semiconductor market. Revenues are expected to reach $85 billion this year, representing a 10% compound annual growth rate. Driving this demand are advances in artificial intelligence, IoT technology and autonomous vehicles, all of which rely on analog ICs for functions such as sensing and power management. Unlike digital ICs, which only process binary signals, analog ICs can process continuous signals such as temperature and sound, making them a necessity for interacting with the physical environment.

With an eye on this expanding market, two Tokyo-based companies—Oki Electric Industries, Ltd. and Nisshinbo Micro Devices—have teamed up to develop thin-film analog ICs. These ICs can also be stacked vertically, which the companies claim facilitates miniaturization of electronic products and integration of more ICs at once. The technology can also reduce costs and increase functionality by implementing more functions in a smaller space or improving performance.

"We live in an analog world made up of sound, light, temperature and pressure," said Toshihiro Ogata, assistant manager of production engineering at Nisshinbo. "Analog ICs connect the physical and digital worlds, processing continuous physical signals such as light and distance detected by cameras and lidar in self-driving cars and converting them into digital data to support safe driving."

Thin-film 3D analog IC development

Development of thin-film 3D analog ICs involves OKI's Crystal Thin Film Bonding (CFB) process, which peels the functional thin-film layer of an analog IC off a substrate. (The exact process is a trade secret.) The separated layer is then bonded to another analog thin-film layer separated by an insulating layer, such as silicon oxide. Bonding is achieved through the attraction between molecules, a phenomenon known as intermolecular bonding. Conventional wire bonding electrically connects the stacked layers.

"Compared to our CFB stacking, standard stacking processes typically use TSVs (through silicon vias, a vertical wiring method that connects stacked chips) and involve advanced processes and special equipment," said Kenichi Tanigawa, general manager of OKI's CFB development department. The thickness of individual chips in a stack wired using TSVs ranges from tens to hundreds of microns, he said. "In CFB stacking, each chip is only 5 to 10 [microns] thick—that's why rewiring can be done using low-cost conventional semiconductor lithography on widely used conventional systems."

CFB stacking also enables the use of a variety of different 3D integration approaches. A simple yet ingenious process uses the same IC design with wiring pads arranged along one edge. After the first layer is laid down, each subsequent IC layer is slightly reduced in size and rotated 90 degrees, leaving the wiring pads of the previous lower layer exposed. This method can be used to connect up to four layers of ICs.

However, because the stacked analog ICs are so thin, crosstalk occurs between the layers, resulting in signal interference, noise, and IC performance degradation. This is where Nisshinbo's proprietary shielding technology comes into play.

"We use aluminum as the shielding material laid down with conventional semiconductor processes," says Nisshinbo's Ogata. If an entire circuit layer were to be shielded, he explains, "it would create a large parasitic capacitance," or unwanted charge storage between circuit layers that would interfere with circuit operation. "This is because, unlike digital ICs that operate at voltages below 5 volts, analog ICs can handle voltages as high as 20 or 30 volts, which increases parasitic capacitance."

To prevent this, shielding is applied only to critical areas where interference occurs between stacked chips, areas that Nisshinbo has identified based on its decades of research and experience working with analog ICs. Ogata said this positioning reduces signal interference without affecting circuit function.

Advantages of Chiplet Integration

The companies note that thin-film 3D analog IC stacking can also be used in situations where analog and digital ICs are combined. This would enable them to be used in chiplets—modular ICs that can be combined to create more complex devices.

"Chiplets offer several advantages over large monolithic devices," Ogata said. Instead of cramming everything onto one large chip, different functions such as sensing, processing, and power management can be handled separately. Each chiplet can be optimized for its specific function, which reduces costs. Stacking chiplets also reduces space requirements, allowing for smaller devices. And manufacturing yields could be higher because if a chiplet is defective, it can be identified and replaced before assembly. (A defect in a large chip means the entire chip must be discarded.)

However, companies may still face some challenges before this advanced integration becomes a reality.

"The chiplet approach is important for the next generation of semiconductor manufacturing," said Gordon Roberts, professor of computer and electrical engineering at McGill University in Montreal. While today's chiplets already allow certain components, such as CPUs, GPUs and memory, to be mixed and matched, the next step in semiconductor evolution will see a more diverse set of components, such as analog, power and optical chips, seamlessly integrated using innovative stacking and interconnect technologies.

"Processes that can assemble a variety of components at low cost are a step in the right direction," said Roberts. "However, because the process uses thinned semiconductor devices stacked on a common substrate, the problem is that the thinning step can introduce manufacturing defects." In addition to threatening manufacturing yields, defects such as cracks can also go unnoticed during testing, leading to reliability issues. "So, it will need to be determined how companies can process individual chips and package them together," said Roberts.

OKI and Nisshinbo believe they can overcome these issues and are already planning to commercialize their new approach.

"Applying our technology to chiplet technology means we will be able to offer a range of different analog ICs," OKI's Tanigawa said. "And heterogeneous integration of various digital, analog, optical and other semiconductor devices will contribute to the development of new semiconductor chips in the future." He added that the two companies have already started developing new products based on their technology and plan to achieve mass production in 2026.

Source: Content compiled from IEEE

Reference link https://spectrum.ieee.org/analog-ic-design

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